Hier kommen der Cadence Virtuoso Schematic Editor für den Schaltungsentwurf und Cadence Spectre für die Simulation zum Einsatz.
Schaltungslayouts werden mit dem Cadence Virtuoso Layout Editor erstellt und mit dem DRC (Entwurfsregelprüfung, engl. design rule check) von Verstößen gegen die Entwurfsregeln befreit.
www.uni-stuttgart.deThe Cadence Virtuoso Schematic Editor and Cadence Spectre are applied for the design or the simulation of circuits, respectively.
Layouts of circuits are drawn with Cadence Virtuoso Layout Editor and DRCs (design rule checks) are performed in order to eliminate violations of the design rules.
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